Assessing Product Design for EMC Compliance – Checklist

As an electrical equipment manufacturer, you must consider many factors when looking at the EMC aspects of a design, and it’s easy to overlook an important point. For that reason, follow the below 10- point basic checklist to assess your product design for EMC compliance.

assessing product design for emc compliance checklist

Product design for EMC compliance checklist

#1. Design your product for EMC compliance from the beginning by knowing what performance requirements the product must fulfil. To do so, check the relevant EMC standards.

#2. Divide the system into critical and non-critical sections to:

  • determine the circuits which will be noisy or susceptible and those which will not
  • lay the circuits out in separate areas as far as possible
  • select internal and external interface locations to allow optimum common-mode current control.

#3. Select electrical components with EMC in mind:

  • use slow and/or high-immunity logic
  • use good power decoupling techniques
  • maximise the dynamic range of analogue signal paths
  • minimise analogue signal bandwidths
  • use series R buffering on all high-speed clock and data lines
  • reduce fan-out on clock circuits by liberal use of buffers
  • use series ferrite chips in the supplies in order to create power segments
  • check stability in wideband amplifiers
  • include resistive, capacitive or ferrite filtering at all sensitive analogue inputs
  • don’t leave unused IC input pins floating
  • if possible, avoid edge-triggered digital inputs
  • incorporate a watchdog circuit on every microprocessor.

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#4. Cables

  • isolate or avoid parallel runs of signal and power cables
  • choose RF-screened cables if the signal cannot be adequately filtered
  • use a twisted pair both outside and within an enclosure to ensure balanced or high DI/DT lines
  • use properly designed ribbon, looms or flexi for internal wiring
  • apply ferrite suppressors to damp resonances and control common mode currents
  • place cables away from apertures in the shielding
  • terminate lines that carry high-frequency signals by using the correct transmission line impedance.

#5. PCB layout (before routing begins)

  • identify and label the high DI/DT circuits and sensitive circuits
  • identify 0V plane(s), power plane segments, power plane layer(s), 0V plane layers, interface ground plane, constant impedance layer(s)
  • decide on layer stack-up
  • identify points for bonding the chassis to the ground plane(s)
  • ensure that ground pins are distributed along multi-way connectors close to sensitive or high-speed signals.

#6. PCB layout (during routing)

  • ensure no tracks cross any breaks in the 0V plane
  • identify and control any common impedance current paths for sensitive wideband circuits and power switching circuits
  • flag any breaks or gaps in a 0V plane
  • ensure that critical and constant-impedance tracks don’t swap layers
  • minimise surface areas of nodes with high DV/DT
  • ensure balanced differential signal track paths by confirming that adequate balance is maintained along the entire run
  • ensure that the decoupling capacitors are adequately placed.

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#7. Grounding:

  • design the ground system at the product definition stage and consider it as a return current path
  • ensure metal-to-metal bonding of filters, screens, connectors and enclosure panels
  • keep earth straps short
  • ensure that bonding methods won’t deteriorate in adverse environments
  • apply a conductive finish to contact surfaces
  • provide an interface ground area for filtering and decoupling
  • avoid common ground impedances for different circuits.

#8. Shielding:

  • design all metallic structures
  • if necessary, design plastic enclosures to allow internal conductive coating
  • avoid large apertures in a shield
  • if the large apertures are unavoidable, take measures to mitigate them
  • consider segregated enclosures
  • avoid dipole-like structures in a metallic enclosure
  • implement DC or RF tie points between the shield and circuit 0V
  • use multiple internal tie-points in order to minimise box resonances
  • use conductive gaskets to ensure that separate panels are well bonded along their seams.

#9. Filters:

  • design the supply filter for the application
  • filter all I/O lines, using common mode chokes and three-terminal capacitors to interface ground
  • ensure a specified ground return for each filter
  • locate all filter components and associated tracks and wiring adjacent to the interface being filtered
  • apply filtering to interference sources directly at their terminals.

#10. Test and evaluate for EMC compliance continuously as the design progresses.

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